EDGE Consortium Failure Analysis Workshop
Registration is Now Open!
Join faculty, students, and engineers from leading semiconductor companies for a full day of technical presentations, networking, and discussions on Failure Analysis in the AI Era.
📅 September 24, 2026📍 NextFlex • San Jose, CA
📝 Registration is free, but required. Register Today
About the Workshop
The EDGE Consortium Failure Analysis Workshop is a one-day event that brings together students, faculty, researchers, and industry professionals to explore the critical role of failure analysis in today's semiconductor industry.
Failure analysis is an interdisciplinary field that combines electrical engineering, materials science, physics, chemistry, and computer science to determine the root causes of semiconductor device failures and improve product reliability. As semiconductor technologies continue to advance, failure analysis plays an increasingly important role in ensuring the performance, quality, and reliability of devices used in artificial intelligence, communications, transportation, healthcare, consumer electronics, and other critical technologies.
Hosted at NextFlex in San Jose, the workshop provides participants with direct exposure to industry experts, emerging technologies, and real-world applications in semiconductor failure analysis.
Why Attend?
Participants will have the opportunity to:
- Learn from engineers and technical leaders working at leading semiconductor companies.
- Explore modern failure analysis techniques and industry best practices.
Gain insight into career opportunities in semiconductor reliability, process engineering, and product development. - Network with students, faculty, researchers, and professionals from academia and industry.
- Discover how failure analysis contributes to the advancement of AI-era semiconductor technologies.
Featured Speakers
The workshop will feature technical presentations from experts representing organizations include:
- NVIDIA
- SIEMENS EDA
- MARVELL
- INTEL
- SEMICAPS
- FA Instruments
- NenoVision
- TESLA
- SANDISK
Additional speaker and presentation details will be announced as they become available.
Workshop Topics
The program will include presentations on topics such as:
- Failure Analysis in the AI Era
- Design for Manufacturability, Testing, and Failure Analysis
- Failure Analysis Process Flow and Sample Preparation
- Electrical Failure Analysis (EFA)
- Optical-Based Failure Analysis
- Electron Beam-Based Failure Analysis Techniques
- Non-Destructive Failure Analysis
- STEM-EBIC in SEM
- Emerging Failure Analysis Technologies
- Industry Case Studies
| Time | Activity |
|---|---|
| 8:45 - 9:15 AM |
Registration |
| 9:15 - 9:30 AM |
Welcome & Workshop Agenda |
| 9:30 - 12:05 PM |
Morning Technical Sessions |
| 12:05 - 12:45 PM |
Lunch |
| 12:45 - 3:50 PM |
Afternoon Technical Sessions |
| 3:50 - 4:50 PM |
Panel Discussion |
| 5:00 - 6:00 PM |
Networking Reception |
A detailed agenda will be available prior to the event.
Who Should Attend?
This workshop is designed for:
- Undergraduate and graduate students
- Faculty and researchers
- Semiconductor industry professionals
- Engineers interested in semiconductor reliability and failure analysis
- Professionals interested in advanced semiconductor technologies
Registration
Registration is required to attend. Attendance is free, but seating is limited.
Registration Link:
Location
NextFlex - San Jose, CA
Additional parking and arrival information will be provided to registered attendee.
Presented By
SEMICAPS and MSS Corps
Organized By
- EDGE Consortium
- SEMICAPS
- NextFlex
- SJSU Department of Electrical Engineering
- University of California, Berkeley
- Stanford University
Questions?
For questions regarding the workshop or registration please contact:
Jackie Jones, Electrical Engineering Department Coordinator
Email: jacquelyn.jones@sjsu.edu
Rose Ring, NenoVision
